Planar Transistors
Planar Transistor Construction
The disadvantages of diffused alloy transistors are overcome in modern transistors, which use silicon as the semiconductor material and the planar type of construction illustrated in fig 3.1.3. These transistors are built up as a series of thin layers (layers,or planes of semiconductor materials built up rather like a multilayer sandwich). Construction is more complex than the alloy diffusion technique, requiring many stages, but as thousands of transistors can be made at the same time - on a single slice of silicon, this method of construction is much cheaper than the "one at a time" alloy diffusion method.

Although making transistors using planar technology involves more process steps than using the alloy diffusion method, many transistors (or whole integrated circuits) can be formed at the same time on a thin slice (called a wafer) cut from a cylindrical ingot of pure silicon. When the transistors have been formed on the wafer, each transistor is tested and any faulty ones are marked with a spot of dye. The wafer is then cut up into the individual transistors (or integrated circuits) and those trasistors marked as faulty are discarded.
As several wafers of silicon can be processed at the same time the planar process is much more economical than the alloy diffusion method.
Making a Planar Transistor.
Steps in Fig. 3.1.4
- 1. Layer 1 - Heavily doped N type Silicon.
- 2. Lightly doped N type silicon is deposited on top of layer 1 making a two layer collector (see"How BJTs Work")
- 3. Part of the collector layer is etched away to form a depression for the P type base layer
- 4. P type base layer is added
- 5. Part of the base layer is etched away leaving a very thin base layer
- 6. A heavily doped N type emitter layer is added
- 7. Finally metal connectors are added allowing leads to be fixed after testing, and separating from the wafer.